Designing a RISC-V CPU, Part 1: Learning hardware design as a software engineer

Designing a RISC-V CPU, Part 1: Learning hardware design as a software engineer

Tue 16 February 2021

I have no experience in digital logic design. That is, I didn’t until I recently decided that I would like to try designing my own CPU and running it on an FPGA! If you too are a software engineer with a vague interest in hardware design, I hope this series of posts about what I’ve learnt will be helpful and interesting. In this first installment, I hope to answer these questions:

  • What is digital logic design?
  • How do I get started, and what tools might I use?

In future installments, I will go into more detail about my CPU design and the RISC-V architecture, as well as hopefully answering these questions:

  • What about digital logic design is fundamentally different from software design?
  • What about digital logic design is similar to software design?

You can see the code for my CPU at the time of writing hereor an up to date version here.

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