# Machine Scheduler in LLVM - Part II

**URL:** <https://forum.devtalk.com/t/machine-scheduler-in-llvm-part-ii/221926>\
**Category:** In The News\
**Tags:** via-news-bot, llvm, in-the-news\
**Created:** [8 November 2025 17:35 UTC](https://forum.devtalk.com/t/machine-scheduler-in-llvm-part-ii/221926 "2025-11-08T17:35:58Z")\
**Posts on this page:** 1\
**Page:** 1

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**Author:** ![CommunityNews](https://forum.devtalk.com/user_avatar/forum.devtalk.com/communitynews/32/1113_2.png) [@CommunityNews](https://forum.devtalk.com/u/CommunityNews)\
**Post date:** [8 November 2025 17:35 UTC](https://forum.devtalk.com/t/machine-scheduler-in-llvm-part-ii/221926/1 "2025-11-08T17:35:58Z")

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> In the first part of this series, we covered the basic workflow of Machine Scheduler – LLVM’s predominated instruction scheduling framework – and learned that an instruction could go through three phases of checks before it finally got scheduled: legality check, feasibility check, and profitibility check.  
> The first two phases – which were explained in details in that post – have direct connections with program correctness and avoiding potential processor hazard, respectiviely.

Read in full here:

> **[Machine Scheduler in LLVM - Part II](https://myhsu.xyz/llvm-machine-scheduler-2/)**
>
> In the first part of this series, we covered the basic workflow of Machine Scheduler – LLVM’s predominated instruction scheduling framework – and learned that an instruction could go through three phases of checks before it finally got scheduled:...
